I am using the Zybo board and am sending packets of data from the host to FPGA in bursts (an array of 32 bit numbers). I am assuming 32bit word sizes is the optimum length from the documentation of the IP Core factory, but what is the optimum burst size I should transfer at a time (fastest)? Is it 512 bytes? I know that DMA transfers handle a certain quantity of data with every transfer, but what is the maximum amount of data that can be handled per transfer across the DMA? The reason we want the largest burst possible from the host to the FPGA is to minimize host system overhead (system calls, etc = SLOW). Along with this same note, I had a few questions about DMA acceleration in the custom ip guide. Does xillybus automatically create RAM buffer space on the FPGA (8 segments of 512 bytes) to queue data blocks sent to the FPGA from the host? Also is there a way to track how many of these buffers are full (1 of 8, 2 of 8, 3 of 8, etc)?
Also, on another note, I believe I will want to use an asynchronous stream from reading the custom IP documentation because I do not care about user space processes as I intend to only be using the Zybo board to run a single C program (and nothing else). Or would you say that C program could consume enough resources that it might be better to use a synchronous stream?
To give a big idea of what is occuring on our zybo board:
Software---------------------------------------------------------->hardware
[C program creates packet] -> [Xillybus DMA transfer] -> [Xillybus automatic buffers on FPGA?] -> [FIFO] -> [serialize data onto a pin]